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  • 1
    Language: English
    In: IET power electronics, 2013-04, Vol.6 (4), p.642-651
    Description: Multilevel inverters have attractive features which make them one of the most popular fields of investigations. They can operate in high power and high voltage conditions. Multilevel inverters generate output voltage with high quality and low harmonic contents. As the number of output voltage levels increases, the quality of the output voltage is improved leading to reduction of the filtering requirements. However, multilevel inverters have the disadvantage of increased power electronic switches. This leads to higher cost, size and complication. Some advanced topologies have been introduced to reduce the number of power electronic switches, unfortunately, most of these topologies need high voltage switches on their structure making them unsuitable for high voltage conditions. In this study, an innovative topology for multilevel inverter is proposed which reduces the number of switches considerably without using high voltage switches. The proposed topology is a general topology which can be extended for any number of voltage levels. The authors call this topology as cross-switched multilevel inverter. The simulation results obtained in PSCAD/EMTDC as well as the experimental results verify the proposed topology.
    Subject(s): cross‐switched multilevel inverter ; power electronic switches ; invertors ; PSCAD/EMTDC ; high power conditions ; filtering requirements ; high voltage conditions ; innovative topology ; power electronics
    ISSN: 1755-4535
    E-ISSN: 1755-4543
    Source: Nexis Uni
    Source: ProQuest Central
    Source: © ProQuest LLC All rights reserved〈img src="https://exlibris-pub.s3.amazonaws.com/PQ_Logo.jpg" style="vertical-align:middle;margin-left:7px"〉
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  • 2
    Article
    Article
    2015
    ISSN: 0036-8075 
    Language: English
    In: Science (American Association for the Advancement of Science), 2015-09-04, Vol.349 (6252), p.1029-1029
    ISSN: 0036-8075
    E-ISSN: 1095-9203
    Source: Single Journals
    Source: Academic Search Ultimate
    Source: © ProQuest LLC All rights reserved〈img src="https://exlibris-pub.s3.amazonaws.com/PQ_Logo.jpg" style="vertical-align:middle;margin-left:7px"〉
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  • 3
    Language: English
    In: IET power electronics, 2013-07, Vol.6 (6), p.1041-1050
    Description: This study proposes and analyses a new cascaded multilevel inverter in both symmetric and asymmetric conditions. Firstly, the topology is presented in general form and then it is optimised. For any given number of voltage levels, the proposed topology reduces the number of switches. In the symmetric condition, the proposed topology offers capability of charge balance control method while reducing the number of switches. Also, unlike the other reduced switch topologies, the proposed topology does not increase the total standing voltage of the switches in comparison with the conventional cascaded H-bridge (CHB) multilevel inverter. In the asymmetric condition, the proposed topology has highest output voltage resolution while keeping the total standing voltage equal to the CHB topology. In other words, in both symmetric and asymmetric conditions the number of switches in the proposed topology is lower than that of the CHB topology. However, both the proposed topology and also the CHB topology have the same total standing voltage on the switches. Other asymmetric topologies use higher number of switches and have higher total standing voltage in comparison with the proposed asymmetric topology. A modified phase-shifted-pulse width modulation is also presented for the proposed symmetric topology. The proposed topology is verified with simulation and experimental results.
    Subject(s): modified phase‐shifted‐pulse width modulation ; PWM invertors ; symmetric conditions ; voltage resolution ; CHB topology ; cascaded cross‐switched multilevel inverter ; voltage levels ; total standing voltage ; asymmetric conditions ; H‐bridge multilevel inverter ; charge balance control method
    ISSN: 1755-4535
    E-ISSN: 1755-4543
    Source: Nexis Uni
    Source: ProQuest Central
    Source: © ProQuest LLC All rights reserved〈img src="https://exlibris-pub.s3.amazonaws.com/PQ_Logo.jpg" style="vertical-align:middle;margin-left:7px"〉
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  • 4
    Language: English
    In: Journal of cellular physiology, 2019-09, Vol.234 (9), p.15357-15368
    Description: Regeneration and functional recovery after peripheral nerve damage still remain a significant clinical problem. In this study, alginate/chitosan (alg/chit) hydrogel was used for the transplantation of olfactory ectomesenchymal stem cells (OE‐MSCs) to promote peripheral nerve regeneration. The OE‐MSCs were isolated from olfactory mucosa biopsies and evaluated by different cell surface markers and differentiation capacity. After creating sciatic nerve injury in a rat model, OE‐MSCs were transplanted to the injured area with alg/chit hydrogel which was prepared and well‐characterized. The prepared hydrogel had the porosity of 91.3 ± 1.27%, the swelling ratio of 379% after 240 min, weight loss percentages of 80 ± 5.56% after 14 days, and good blood compatibility. The 3‐(4,5‐dimethylthiazol‐2‐yl)‐2,5‐diphenyltetrazolium bromide assay, 4′,6‐diamidino‐2‐phenylindole, and LIVE/DEAD staining were done to assay the behavior of OE‐MSCs on alg/chit hydrogel and the results confirmed that the hydrogel can provide a suitable substrate for cell survival. For functional analysis, alg/chit hydrogel with and without OE‐ MSCs was injected into a 3‐mm sciatic nerve defect of Wistar rats. The results of the sciatic functional index, hot plate latency, electrophysiological assessment, weight‐loss percentage of wet gastrocnemius muscle, and histopathological examination using hematoxylin–eosin and Luxol fast blue staining showed that utilizing alg/chit hydrogel with OE‐MSCs to the sciatic nerve defect enhance regeneration compared to the control group and hydrogel without cells. Figure 10 using alginate/chitosan hydrogel to transplantation olfactory ectomesenchymal stem cells to improve the effectiveness of peripheral nerve regeneration.
    Subject(s): alginate/chitosan ; tissue engineering ; hydrogel ; olfactory ectomesenchymal stem cells ; sciatic nerve ; Transplantation ; Porosity ; Cell differentiation ; Tissue engineering ; Analysis ; Stem cells
    ISSN: 0021-9541
    E-ISSN: 1097-4652
    Source: Alma/SFX Local Collection
    Source: © ProQuest LLC All rights reserved〈img src="https://exlibris-pub.s3.amazonaws.com/PQ_Logo.jpg" style="vertical-align:middle;margin-left:7px"〉
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  • 5
    Language: English
    In: IET power electronics, 2014-03, Vol.7 (3), p.576-590
    Description: Dynamic voltage restorer (DVR) is a power electronic converter-based custom power device used to compensate for voltage variations. The inverter used in the DVR structure can have different topologies. Multilevel inverters are a good candidate to be used in the DVR structure especially in higher voltage level. This study proposes a new scheme for DVR based on a multilevel inverter. In the proposed DVR, a dc–dc converter is attached to the multilevel inverter. The dc-link voltage is regulated by the dc–dc converter considering the voltage sag magnitude. In this way, the output voltage of the multilevel inverter has always its maximum possible number of levels. This results in better quality of output voltage in both deep and shallow voltage sags. It is important to emphasise that the existing inverter-based DVR topologies do not have this capability. Also, in the proposed DVR, there is no need for an output filter. Moreover, the fundamental frequency control method for the multilevel inverter can be used instead of pulse width modulation-based methods. This can result in lower switching losses and lower switching stresses. The mathematical analysis of the operation range of the proposed DVR is given in detail. The simulation results using Power System Computer Aided Design/Electromagnetic Transient including DC (PSCAD/EMTDC) as well as the experimental results from a laboratory prototype verify the proposed DVR scheme.
    Subject(s): deep voltage sags ; adjustable DC‐link voltage ; PWM power convertors ; DC‐DC converter ; dynamic voltage restorer ; inverter‐based DVR topology ; PSCAD‐EMTDC ; pulse width modulation‐based method ; frequency control ; losses ; fundamental frequency control method ; power electronic converter‐based custom power device ; voltage sag magnitude ; power supply quality ; voltage variation ; invertors ; multilevel inverter ; DVR structure ; switching stresses ; shallow voltage sags ; output voltage quality ; power system restoration ; switching losses
    ISSN: 1755-4535
    E-ISSN: 1755-4543
    Source: Nexis Uni
    Source: ProQuest Central
    Source: © ProQuest LLC All rights reserved〈img src="https://exlibris-pub.s3.amazonaws.com/PQ_Logo.jpg" style="vertical-align:middle;margin-left:7px"〉
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  • 6
    Language: English
    In: IET power electronics, 2013-07, Vol.6 (6), p.1188-1196
    Description: In this study, firstly a new basic unit is proposed for multilevel converters. The proposed basic units are used as building blocks to form a cascaded multilevel converter. In other words, the proposed topology consists of cascaded basic units. The proposed basic unit and the proposed multilevel converter use lower number of switching devices and gate driver circuits. In the proposed topology, two design parameters are available: the number of cascaded basic units and the number of dc voltage sources in each basic unit. These two parameters can be used to design the desired multilevel converter based on the operational conditions. Therefore the proposed topology offers good flexibility in designing. An algorithm for determining the values of the dc voltage sources is given in order to generate maximum number of voltage levels. The comparison results with some recently introduced topologies show that the proposed topology effectively reduces the components count. The simulation results obtained in PSCAD/EMTDC as well as the experimental results of a 51-level inverter based on the proposed topology are presented to verify its performance.
    Subject(s): asymmetrical multilevel converter topology ; cascade networks ; PSCAD/EMTDC simulation ; design parameters ; driver circuits ; switching convertors ; invertors ; cascaded basic units ; operational conditions ; 51‐level inverter ; dc voltage source value determination ; cascaded multilevel converter ; switching devices ; gate driver circuits
    ISSN: 1755-4535
    E-ISSN: 1755-4543
    Source: Nexis Uni
    Source: ProQuest Central
    Source: © ProQuest LLC All rights reserved〈img src="https://exlibris-pub.s3.amazonaws.com/PQ_Logo.jpg" style="vertical-align:middle;margin-left:7px"〉
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  • 7
    Language: English
    In: International journal of circuit theory and applications, 2019-11, Vol.47 (11), p.1812-1836
    Description: Summary In this paper, the concept of converter design, using the least number of elements and achieving high voltage gain at the low duty cycle, is proposed for the microgrids. One of the important issues in the microgrids is boosting the low voltage output of sources to the utility voltage level. Therefore, the step‐up DC‐DC converters are widely used in these systems to attain the utility voltage. The benchmarking of the converters mainly in terms of the voltage gain, efficiency, the number of active and passive components, stresses on semiconductors, and simplicity is considered. In this paper, a new extendable non‐isolated boost DC‐DC converter is presented. Comparing the conventional boost converter, the basic structure of the proposed converter has a high voltage gain and reduced stress on the switch. To increase the voltage gain, the basic structure of the proposed converter can be easily extended. The modulation technique employed is high‐frequency pulse‐width modulation (PWM). The detailed analysis of the proposed converter in continuous current mode (CCM) and discontinuous current mode (DCM) is presented. The relations between currents and voltages and the voltage gain in CCM and DCM are obtained. Experimental results are carried out to verify theoretical concepts by using the hardware prototype. A new converter design using the least number of elements and achieving high voltage gain at the low duty cycle is proposed for the microgrids. The benchmarking of the converters mainly in terms of the voltage gain, efficiency, the number of active and passive components, stresses on semiconductors, and simplicity is considered. The basic structure of the proposed converter has the high voltage gain and reduced stress on the switch.
    Subject(s): discontinuous current mode (DCM) ; voltage gain ; continues current mode (CCM) ; non‐isolated step‐up DC‐DC converter ; microgrids
    ISSN: 0098-9886
    E-ISSN: 1097-007X
    Source: Alma/SFX Local Collection
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  • 8
    Language: English
    In: Journal of sport rehabilitation, 2020-11-01, Vol.29 (8), p.1100-1105
    Description: Many factors have been reported contributing to altering the neuromuscular function of hip and knee muscles. The lumbar hyperlordosis, as a poor posture in some athletes, is thought to be associated with the alteration of the hip and knee muscles activity. To examine the activation of selected hip and knee muscles in athletes with and without lumbar hyperlordosis during functional activities. Case-control study. University laboratory. Twenty-six college male athletes (n = 13 with and n = 13 without lumbar hyperlordosis). Surface electromyography of gluteus maximus (GMAX), gluteus medius (GMED), vastus medialis oblique (VMO), and vastus lateralis (VL) were recorded during single-leg squat and single-leg jump landing (SLJL) tasks. Preactivity; reactivity; and onset muscle during SLJL and eccentric activity during single-leg squat (GMAX, GMED, VMO, and VL along with the ratio of VMO:VL) were assessed. Athletes with lumbar hyperlordosis had a higher level of activity in their GMAX (P = .003), VMO (P = .04), and VL (P = .01) muscles at the moment before foot contact during SLJL. These athletes also demonstrated a higher level of GMAX activity (P = .01) immediately after foot contact. Finally, athletes with lumbar hyperlordosis activated their GMAX sooner (P = .02) during the SLJL. Athletes with normal lumbar lordosis had more activity in their GMED muscle (P = .001) in the descending phase of the single-leg squat task and a higher VMO:VL (P = .01) at the moment after the foot contact during the SLJL. The altered activation of GMAX, GMED, VMO, VL, and VMO:VL can reveal the role of lumbar hyperlordosis in the knee and hip muscles' alteration in athletes. Further study is needed to identify whether these alterations in the hip and knee muscles contribute to injury in athletes.
    Subject(s): Buttocks ; Young Adult ; Exercise Test ; Humans ; Muscle, Skeletal - physiopathology ; Adult ; Lordosis - physiopathology ; Electromyography ; Athletes ; Case-Control Studies ; Index Medicus
    ISSN: 1056-6716
    E-ISSN: 1543-3072
    Source: SPORTDiscus with Full Text
    Source: © ProQuest LLC All rights reserved〈img src="https://exlibris-pub.s3.amazonaws.com/PQ_Logo.jpg" style="vertical-align:middle;margin-left:7px"〉
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  • 9
    Language: English
    In: International journal of circuit theory and applications, 2019-03, Vol.47 (3), p.464-482
    Description: Summary In this paper, a new structure for a DC‐DC boost converter is proposed. The presented converter provides a high voltage transfer gain with lower duty cycle. Low current and low voltage stress on the switch, enlarged area of operating in continuous conduction mode (CCM), reduced size of the inductors, and the input filter are the main advantages of the proposed converter. The high voltage transfer gain with low number of elements has made it suitable to implement. Hence, using only one switch has made the control of the proposed converter easy. Besides, decreased switching losses and higher efficiency are obtained. The proposed structure is a combination of the Luo converter and a booster unit, which its analysis is studied in three modes, CCM, boundary conduction mode (BCM), and discontinuous conduction mode (DCM). Furthermore, in order to validate the analysis and feasibility of the proposed converter, the experimental results are developed on a low power prototype. In this paper, a new structure for a DC‐DC boost converter is proposed. The presented converter provides a high voltage transfer gain with lower duty cycle. Low current and low voltage stress on the switch, enlarged area of operating in continuous conduction mode, reduced size of the inductors, and the input filter are the main advantages of the proposed converter.
    Subject(s): DC‐DC boost converter ; voltage stress ; high voltage transfer gain ; continuous conduction mode ; Electric current converters
    ISSN: 0098-9886
    E-ISSN: 1097-007X
    Source: Alma/SFX Local Collection
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  • 10
    Language: English
    In: IEEE transactions on power electronics, 2013-02, Vol.28 (2), p.625-636
    Description: Application of multilevel inverters for higher power purposes in industries has become more popular. This is partly because of high-quality output waveform of multilevel inverters in comparison with two-level inverters. In this paper, initially a new topology for submultilevel inverter is proposed and then series connection of the submultilevel inverters is proposed as a generalized multilevel inverter. The proposed multilevel inverter uses reduced number of switching devices. Special attention has been paid to obtain optimal structures regarding different criteria such as number of switches, standing voltage on the switches, number of dc voltage sources, etc. The proposed multilevel inverter has been analyzed in both symmetric and asymmetric conditions. The validity of the proposed multilevel inverter is verified with both computer simulations using PSCAD/EMTDC software and laboratory prototype implementation.
    Subject(s): Insulated gate bipolar transistors ; submultilevel inverter ; multilevel inverter ; Capacitors ; Switches ; Generalized topology ; Logic gates ; optimal structure ; Inverters ; Topology ; Equations ; Electrical engineering. Electrical power engineering ; Exact sciences and technology ; Signal convertors ; Switching, multiplexing, switched capacity circuits ; Electronics ; Applied sciences ; Circuit properties ; Electronic equipment and fabrication. Passive components, printed wiring boards, connectics ; Electric, optical and optoelectronic circuits ; Power electronics, power supplies ; Electronic circuits ; Engineering design ; Electric inverters ; Design and construction ; Research ; Algebraic topology ; Methods
    ISSN: 0885-8993
    E-ISSN: 1941-0107
    Source: IEEE Electronic Library (IEL)
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